| PART |
Description |
Maker |
| 74AUP2G80GN 74AUP2G80GD |
Low-power dual D-type flip-flop; positive-edge trigger AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO8
Low-power dual D-type flip-flop; positive-edge trigger 低功耗双D型触发器;上升沿触
|
NXP Semiconductors N.V.
|
| HCTS374T HCTS374KTR HCTS374DTR |
Dual Positive-Edge-Triggered D-type Flip-Flops With Clear And Preset 20-LCCC -55 to 125
1024 x 18 Synchronous FIFO Memory 68-CPGA -55 to 125
Radiation Hardened Octal D-Type Flip-Flop, Three-State, Positive Edge Triggered
|
Intersil Corporation
|
| 74AUP2G80GD125 74AUP2G80GM125 |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT996-2 (XSON8U); Container: Reel Pack, Reverse, Reverse AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse
|
NXP Semiconductors N.V.
|
| 74VHCT74A 74VHCT74AM 74VHCT74ASJ 74VHCT74 74VHCT74 |
Octal D-type Edge-Triggered Flip-Flops With 3-State Outputs 20-SOIC -40 to 85 AHCT/VHCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
Dual D-Type Flip-Flop with Preset and Clear AHCT/VHCT/VT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| DM74AS74 DM74AS74SJX DM74AS74M DM74AS74N DM74AS74S |
Dual D-Type Positive-Edge-Triggered Flip-Flop with Preset and Clear AS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| EN29F040A-70TI EN29F040A-70TC EN29F040A-70TCP EN29 |
4 Megabit (512K x 8-bit) Flash Memory 4兆位（为512k × 8位）闪存
Dual D-Type Positive Edge-Triggered Flip-Flop; Package: DIP; No of Pins: 14; Container: Rail
Dual D-Type Positive Edge-Triggered Flip-Flop; Package: TSSOP; No of Pins: 14; Container: Tape & Reel
Dual D-Type Positive Edge-Triggered Flip-Flop; Package: TSSOP; No of Pins: 14; Container: Rail
4 Megabit (512K x 8-bit) Flash Memory
|
Electronic Theatre Controls, Inc.
Eon Silicon Solution Inc.
Eon Silicon Solution In...
|
| 74LV109 74LV109D 74LV109DB 74LV109N 74LV109PW 74LV |
Dual JK flip-flop with set and reset; positive-edge trigger LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
From old datasheet system
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| DM7474 |
Dual Positive-Edge-Triggered D-Type Flip-Flops
|
Fairchild
|
| 74F50728 N74F50728N I74F50728D I74F50728N N74F5072 |
Synchronizing cascaded dual positive edge-triggered D-type flip-flop
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| U74LVC74AL-P14-R U74LVC74AL-P14-T U74LVC74AL-S14-T |
DUAL POSITIVE-EDGE TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
|
Unisonic Technologies
|
| 74HC74N |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
NXP Semiconductors
|
